64

Area efficient floating-point FFT butterfly architectures based on multi-operand adders

Year:
2015
Language:
english
File:
PDF, 195 KB
english, 2015
70

Design of Power Efficient Posit Multiplier

Year:
2020
Language:
english
File:
PDF, 1.56 MB
english, 2020
71

Improved design of high-frequency sequential decimal multipliers

Year:
2014
Language:
english
File:
PDF, 281 KB
english, 2014
76

Decimal SRT Square Root: Algorithm and Architecture

Year:
2013
Language:
english
File:
PDF, 483 KB
english, 2013
88

Improvements on the design and implementation of DVB-S2 LDPC decoders

Year:
2011
Language:
english
File:
PDF, 295 KB
english, 2011