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51

[IEEE Formal Methods in Computer Aided Design (FMCAD'07) - Austin, TX, USA (2007.11.11-2007.11.14)] Formal Methods in Computer Aided Design (FMCAD'07) - Improved Design Debugging Using Maximum Satisfiability

Safarp, Sean, Mangassarian, Hratch, Veneris, Andreas, Liffiton, Mark H., Sakallah, Karem A.

Year:

2007

Language:

english

File:

PDF, 185 KB

english, 2007

52

[IEEE Comput. Soc. Press 1993 IEEE International Conference on Computer Design ICCD'93 - Cambridge, MA, USA (3-6 Oct. 1993)] Proceedings of 1993 IEEE International Conference on Computer Design ICCD'93 - Ravel-XL: a hardware accelerator for assigned-delay compiled-code logic gate simulation

Riepe, M.A., Marques Silva, J.P., Sakallah, K.A., Brown, R.B.

Year:

1993

Language:

english

File:

PDF, 395 KB

english, 1993

53

Critical paths in circuits with level-sensitive latches

Burks, T.M., Sakallah, K.A., Mudge, T.N.

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

1995

Language:

english

File:

PDF, 1.91 MB

english, 1995

54

[IEEE Comput. Soc 2000 IEEE International Conference on Computer Design: VLSI in Computers and Processors. ICCD 2000 - Austin, TX, USA (17-20 Sept. 2000)] Proceedings 2000 International Conference on Computer Design - On solving stack-based incremental satisfiability problems

Joonyoung Kim,, Whittemore, J., Sakallah, K.

Year:

2000

Language:

english

File:

PDF, 346 KB

english, 2000

55

[IEEE GaAs IC Symposium Technical Digest 1992 - Miami Beach, FL, USA (4-7 Oct. 1992)] GaAs IC Symposium Technical Digest 1992 - GaAs RISC processors

Brown, R.B., Barker, P., Chandna, A., Huff, T.R., Kayssi, A.I., Lomax, R.J., Mudge, T.N., Nagle, D., Sakallah, K.A., Sherhart, P.J., Uhlig, R., Upton, M.

Year:

1992

Language:

english

File:

PDF, 579 KB

english, 1992

56

[IEEE 2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) - San Jose, CA, USA (2013.11.18-2013.11.21)] 2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) - Generalized Boolean symmetries through nested partition refinement

Katebi, Hadi, Sakallah, Karem A., Markov, Igor L.

Year:

2013

Language:

english

File:

PDF, 964 KB

english, 2013

57

[IEEE 2002 IEEE/ACM International Conference on Computer Aided Design (ICCAD) - San Jose, CA, USA (10-14 Nov. 2002)] IEEE/ACM International Conference on Computer Aided Design, 2002. ICCAD 2002. - Resynthesis of multi-level circuits under tight constraints using symbolic optimization

Kravets, V.N., Sakallah, K.A.

Year:

2002

Language:

english

File:

PDF, 557 KB

english, 2002

58

[IEEE Asia and South Pacific Conference on Design Automation, 2006. - Yokohama, Japan (Jan. 24, 2006)] Asia and South Pacific Conference on Design Automation, 2006. - Refinement strategies for verification methods based on datapath abstraction

Andraus, Z.S., Liffiton, M.H., Sakallah, K.A.

Year:

2006

Language:

english

File:

PDF, 142 KB

english, 2006

59

[ACM 33rd Design Automation Conference - Las Vegas, NV, USA (3-7 June 1996)] 33rd Design Automation Conference Proceedings, 1996 - Modeling the effects of temporal proximity of input transitions on gate propagation delay and transition time

Chandramouli, V., Sakallah, K.A.

Year:

1996

Language:

english

File:

PDF, 660 KB

english, 1996

60

Solution and Optimization of Systems of Pseudo-Boolean Constraints

Aloul, Fadi A., Ramani, Arathi, Sakallah, Karem A., Markov, Igor L.

Journal:

IEEE Transactions on Computers

Year:

2007

Language:

english

File:

PDF, 2.56 MB

english, 2007

61

[IEEE Electrical Performance of Electronic Packaging - Napa, CA, USA (28-30 Oct. 1996)] Electrical Performance of Electronic Packaging - System level EM modeling of digital IC packages and PC boards

Jong-Gwan Yook,, Arabi, T., Schreyer, T., Katehi, L.P., Sakallah, K.A.

Year:

1996

Language:

english

File:

PDF, 261 KB

english, 1996

62

[IEEE Comput. Soc. Press International Conference on Computer Aided Design - San Jose, CA, USA (10-14 Nov. 1996)] Proceedings of International Conference on Computer Aided Design - Timing verification of sequential domino circuits

Van Campenhout, D., Mudge, T., Sakallah, K.A.

Year:

1996

Language:

english

File:

PDF, 571 KB

english, 1996

63

Face Facts [the big picture]

Van Campenhout, D., Mudge, T., Sakallah, K.A.

Journal:

Year:

2008

File:

PDF, 4.38 MB

2008

64

[IEEE Comput. Soc. Press EURO-DAC '92: European Design Automation Conference - Hamburg, Germany (7-10 Sept. 1992)] Proceedings EURO-DAC '92: European Design Automation Conference - Delay macromodels for the timing analysis of GaAs DCFL

Kayssi, A.I., Sakallah, K.A.

Year:

1992

Language:

english

File:

PDF, 305 KB

english, 1992

65

[IEEE Proceedings of 39th Design Automation Conference - New Orleans, LA, USA (2002.6.10-2002.6.14)] Proceedings 2002 Design Automation Conference (IEEE Cat. No.02CH37324) - Solving difficult SAT instances in the presence of symmetry

Aloul, F.A., Ramani, A., Markov, I.L., Sakallah, K.A.

Year:

2002

Language:

english

File:

PDF, 926 KB

english, 2002

66

[IEEE IEEE/ACM International Conference on Computer Aided Design. ICCAD 2001. IEEE/ACM Digest of Technical Papers - San Jose, CA, USA (4-8 Nov. 2001)] IEEE/ACM International Conference on Computer Aided Design. ICCAD 2001. IEEE/ACM Digest of Technical Papers (Cat. No.01CH37281) - Faster SAT and smaller BDDs via common function structure

Aloul, F.A., Markov, I.L., Sakallah, K.A.

Year:

2001

Language:

english

File:

PDF, 722 KB

english, 2001

67

[IEEE 15th Annual GaAs IC Symposium - San Jose, CA, USA (10-13 Oct. 1993)] 15th Annual GaAs IC Symposium - Delay modeling for GaAs DCFL circuits

Kayssi, A.I., Sakallah, K.A.

Year:

1993

Language:

english

File:

PDF, 350 KB

english, 1993

68

[IEEE ISCAS '98 1998 IEEE International Symposium on Circuits and Systems - Monterey, CA, USA (31 May-3 June 1998)] ISCAS '98. Proceedings of the 1998 IEEE International Symposium on Circuits and Systems (Cat. No.98CH36187) - Realistic delay modeling in satisfiability-based timing analysis

e Silva, L.G., Marques Silva, J.P., Silveira, L.M., Sakallah, K.A.

Year:

1998

Language:

english

File:

PDF, 531 KB

english, 1998

69

[IEEE Comput. Soc Design, Automation and Test in Europe - Paris, France (23-26 Feb. 1998)] Proceedings Design, Automation and Test in Europe - AFTA: A formal delay model for functional timing analysis

Chandramouli, V., Whittemore, J.P., Sakallah, K.A.

Year:

1998

Language:

english

File:

PDF, 61 KB

english, 1998

70

[IEEE Comput. Soc. Press 1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers - Santa Clara, CA, USA (11-15 Nov. 1990)] 1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers - CheckT/sub c/ and minT/sub c/: timing verification and optimal clocking of synchronous digital circuits

Sakallah, K.A., Mudge, T.N., Olukotun, O.A.

Year:

1990

File:

PDF, 297 KB

1990

71

[IEEE Comput. Soc. Press Systems Integration '90. First International Conference on Systems Integration - Morristown, NJ, USA (23-26 April 1990)] Systems Integration '90. Proceedings of the First International Conference on Systems Integration - Clock qualification algorithm for timing analysis of custom CMOS VLSI circuits with overlapped clocking disciplines and on-section clock derivation

Menon, S.C., Sakallah, K.A.

Year:

1990

Language:

english

File:

PDF, 475 KB

english, 1990

72

[IEEE IEEE/ACM International Conference on Computer-Aided Design - San Jose, CA (November 6-10, 1994)] IEEE/ACM International Conference on Computer-Aided Design - Optimization Of Critical Paths In Circuits With Level-sensitive Latches

Burks, T.M., Sakallah, K.A.

Year:

1984

Language:

english

File:

PDF, 632 KB

english, 1984

73

Analytical transient response of CMOS inverters

Kayssi, A.I., Sakallah, K.A., Burks, T.M.

Journal:

IEEE Transactions on Circuits and Systems I Fundamental Theory and Applications

Year:

1992

Language:

english

File:

PDF, 355 KB

english, 1992

74

[IEEE International Conference on Computer Aided Design (ICCAD) - San Jose, CA, USA (5-9 Nov. 2000)] IEEE/ACM International Conference on Computer Aided Design. ICCAD - 2000. IEEE/ACM Digest of Technical Papers (Cat. No.00CH37140) - Generalized symmetries in Boolean functions

Kravets, V.N., Sakallah, K.A.

Year:

2000

Language:

english

File:

PDF, 783 KB

english, 2000

75

[IEEE Comput. Soc. Press International Conference on Computer Aided Design - San Jose, CA, USA (10-14 Nov. 1996)] Proceedings of International Conference on Computer Aided Design - An approximate timing analysis method for datapath circuits

Yalcin, H., Hayes, J.P., Sakallah, K.A.

Year:

1996

Language:

english

File:

PDF, 540 KB

english, 1996

76

[IEEE Comput. Soc. Press 1991 IEEE International Conference on Computer-Aided Design Digest of Technical Papers - Santa Clara, CA, USA (11-14 Nov. 1991)] 1991 IEEE International Conference on Computer-Aided Design Digest of Technical Papers - FPD-an environment for exact timing analysis

Silva, J.P., Sakallah, K.A., Vidigal, L.M.

Year:

1991

File:

PDF, 360 KB

1991

77

[IEEE Electrical Performance of Electronic Packaging - Portland, OR, USA (2-4 Oct. 1995)] Proceedings of Electrical Performance of Electronic Packaging - Computation of switching noise in PCBs for digital packages

Jong-Gwan Yook,, Chandramouli, V., Katehi, L.P., Sakallah, K.A.

Year:

1995

Language:

english

File:

PDF, 220 KB

english, 1995

78

[IEEE Comput. Soc Seventeenth Conference on Advanced Research in VLSI - Ann Arbor, MI, USA (15-16 Sept. 1997)] Proceedings Seventeenth Conference on Advanced Research in VLSI - Signal delay in coupled, distributed RC lines in the presence of temporal proximity

Chandramouli, V., Kayssi, A.I., Sakallah, K.A.

Year:

1997

Language:

english

File:

PDF, 784 KB

english, 1997

79

[IEEE 2002 IEEE/ACM International Conference on Computer Aided Design (ICCAD) - San Jose, CA, USA (10-14 Nov. 2002)] IEEE/ACM International Conference on Computer Aided Design, 2002. ICCAD 2002. - Generic ILP versus specialized 0-1 ILP: an update

Aloul, F.A., Ramani, A., Markov, I.L., Sakallah, K.A.

Year:

2002

Language:

english

File:

PDF, 619 KB

english, 2002

80

[IEEE Conference of Asia and South Pacific Design Automation 2003 - Kitakyushu, Japan (21-24 Jan. 2003)] Proceedings of the ASP-DAC Asia and South Pacific Design Automation Conference, 2003. - SAT-based sequential depth computation

Mneimneh, M., Sakallah, K.

Year:

2003

Language:

english

File:

PDF, 656 KB

english, 2003

81

[IEEE Comput. Soc. Press 1992 IEEE Multi-Chip Module Conference MCMC-92 - Santa Cruz, CA, USA (18-20 March 1992)] Proceedings 1992 IEEE Multi-Chip Module Conference MCMC-92 - Delay macromodels for point-to-point MCM interconnections

Kayssi, A.I., Sakallah, K.A.

Year:

1992

Language:

english

File:

PDF, 298 KB

english, 1992

82

[IEEE Comput. Soc IEEE 27th International Symposium on Fault Tolerant Computing - Seattle, WA, USA (24-27 June 1997)] Proceedings of IEEE 27th International Symposium on Fault Tolerant Computing - Robust search algorithms for test pattern generation

Silva, J.O.M., Sakallah, K.A.

Year:

1997

Language:

english

File:

PDF, 784 KB

english, 1997

83

[IEEE 2006 IEEE/ACM International Conference on Computer Aided Design - Double Tree Hotel, San Jose, CA,USA (2006.11.5-2006.11.9)] 2006 IEEE/ACM International Conference on Computer Aided Design - SMT(CLU): A Step toward Scalability in System Verification

Sheini, Hossein, Sakallah, Karem

Year:

2006

Language:

english

File:

PDF, 10.18 MB

english, 2006

84

[IEEE Comput. Soc 2002 IEEE International Conference on Computer Design - Freiberg, Germany (16-18 Sept. 2002)] Proceedings. IEEE International Conference on Computer Design: VLSI in Computers and Processors - Improving the efficiency of circuit-to-BDD conversion by gate and input ordering

Aloul, F.A., Markov, I.L., Sakallah, K.A.

Year:

2002

Language:

english

File:

PDF, 396 KB

english, 2002

85

[IEEE Comput. Soc. Press IEEE International Conference on Computer Design: VLSI in Computers and Processors - Cambridge, MA, USA (14-16 Oct. 1991)] [1991 Proceedings] IEEE International Conference on Computer Design: VLSI in Computers and Processors - Optimal clocking of circular pipelines

Sakallah, K.A., Mudge, T.N., Burks, T.M., Davidson, E.S.

Year:

1991

Language:

english

File:

PDF, 412 KB

english, 1991

86

[IEEE Comput. Soc Meeting on Design Automation and Test in Europe - Paris, France (27-30 March 2000)] Proceedings Design, Automation and Test in Europe Conference and Exhibition 2000 (Cat. No. PR00537) - Constructive library-aware synthesis using symmetries

Kravet, V.N., Sakallah, K.A.

Year:

2000

Language:

english

File:

PDF, 189 KB

english, 2000

87

[IEEE Comput. Soc Meeting on Design Automation and Test in Europe - Paris, France (27-30 March 2000)] Proceedings Design, Automation and Test in Europe Conference and Exhibition 2000 (Cat. No. PR00537) - An experimental study of satisfiability search heuristics

Aloul, F.A., Marques-Silva, J.P., Sakallah, K.A.

Year:

2000

Language:

english

File:

PDF, 13 KB

english, 2000

88

[IEEE Comput. Soc. Press IEEE/ACM International Conference on Computer-Aided Design - Santa Clara, CA, USA (1994.11.6-1994.11.10)] IEEE/ACM International Conference on Computer-Aided Design - Using constraint geometry to determine maximum rate pipeline clocking

Chang,, Davidson,, Sakallah,

Year:

1992

Language:

english

File:

PDF, 550 KB

english, 1992

89

[IEEE Comput. Soc. Press IEEE/ACM International Conference on Computer-Aided Design - Santa Clara, CA, USA (1994.11.6-1994.11.10)] IEEE/ACM International Conference on Computer-Aided Design - Identification of critical paths in circuits with level-sensitive latches

Burks,, Sakallah,, Mudge,

Year:

1992

Language:

english

File:

PDF, 461 KB

english, 1992

90

[IEEE ASP-DAC 2004: Asia and South Pacific Design Automation Conference 2004 - Yohohama, Japan (27-30 Jan. 2004)] ASP-DAC 2004: Asia and South Pacific Design Automation Conference 2004 (IEEE Cat. No.04EX753) - Preserving synchronizing sequences of sequential circuits after retiming

Mneimneh, M.N., Sakallah, K.A., Moondanos, J.

Year:

2004

Language:

english

File:

PDF, 462 KB

english, 2004

91

[IEEE Comput. Soc Design, Automation and Test in Europe. Conference and Exhibition 2001 - Munich, Germany (13-16 March 2001)] Proceedings Design, Automation and Test in Europe. Conference and Exhibition 2001 - A Boolean satisfiability-based incremental rerouting approach with application to FPGAs

Gi-Joon Nam,, Sakallah, K., Rutenbar, R.

Year:

2001

Language:

english

File:

PDF, 549 KB

english, 2001

92

[IEEE Comput. Soc. Press IEEE/ACM International Conference on Computer-Aided Design - Santa Clara, CA, USA (1994.11.6-1994.11.10)] IEEE/ACM International Conference on Computer-Aided Design - Ravel: assinged-delay compiled-code logic simulation

Shriver,, Sakallah,

Year:

1992

Language:

english

File:

PDF, 461 KB

english, 1992

93

[IEEE Comput. Soc Meeting on Design Automation and Test in Europe - Paris, France (27-30 March 2000)] Proceedings Design, Automation and Test in Europe Conference and Exhibition 2000 (Cat. No. PR00537) - On applying incremental satisfiability to delay fault testing

Joonyoung Kim,, Whittemore, J., Marques-Silva, J.P., Sakallah, K.

Year:

2000

Language:

english

File:

PDF, 154 KB

english, 2000

94

[IEEE Design, Automation and Test in Europe - Munich, Germany (07-11 March 2005)] Design, Automation and Test in Europe - Pueblo: A Modern Pseudo-Boolean SAT Solver

Sheini, H.M., Sakallah, K.A.

Year:

2005

Language:

english

File:

PDF, 117 KB

english, 2005

95

[IEEE ASP-DAC 2004: Asia and South Pacific Design Automation Conference 2004 - Yohohama, Japan (27-30 Jan. 2004)] ASP-DAC 2004: Asia and South Pacific Design Automation Conference 2004 (IEEE Cat. No.04EX753) - ShatterPB: symmetry-breaking for pseudo-boolean formulas

Aloulb, F.A., Ramani, A., Markov, I.L., Sakallah, K.A.

Year:

2004

Language:

english

File:

PDF, 362 KB

english, 2004

96

[IEEE 2006 Formal Methods in Computer Aided Design - San Jose, CA (2006.11.12-2006.11.12)] 2006 Formal Methods in Computer Aided Design - Ario: A Linear Integer Arithmetic Logic Solver

Sheini, Hossein, Sakallah, Karem

Year:

2006

Language:

english

File:

PDF, 119 KB

english, 2006

97

[IEEE 1993 IEEE International Solid-State Circuits Conference Digest of Technical Papers - San Francisco, CA, USA (1993.02.24-1993.02.26)] 1993 IEEE International Solid-State Circuits Conference Digest of Technical Papers - A 160000 transistor GaAs microprocessor

Upton, M., Huff, T., Sherhart, P., Barker, P., McVay, R., Stanley, T., Brown, R., Lomax, R., Mudge, T., Sakallah, K.

Year:

1993

Language:

english

File:

PDF, 455 KB

english, 1993

98

[IEEE 2003. Design Automation Conference - Anaheim, CA, USA (2-6 June 2003)] Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451) - Shatter: efficient symmetry-breaking for Boolean satisfiability

Aloul, F.A., Markov, I.L., Sakallah, K.A.

Year:

2003

Language:

english

File:

PDF, 478 KB

english, 2003

99

The impact of signal transition time on path delay computation

Kayssi, A.I., Sakallah, K.A., Mudge, T.N.

Journal:

IEEE Transactions on Circuits and Systems II Analog and Digital Signal Processing

Year:

1993

Language:

english

File:

PDF, 842 KB

english, 1993

100

[IEEE Comput. Soc. Press EURO-DAC 93 and EURO-VHDL 93- European Design Automation Conference - Hamburg, Germany (20-24 Sept. 1993)] Proceedings of EURO-DAC 93 and EURO-VHDL 93- European Design Automation Conference - Concurrent path sensitization in timing analysis

Marques Silva, J., Sakallah, K.A.

Year:

1993

Language:

english

File:

PDF, 325 KB

english, 1993