Performance analysis of multistage ATM switch with...

Performance analysis of multistage ATM switch with partially shared buffers under nonuniform traffic

Keisuke Takemori, Shigeki Shiokawa, Iwao Sasase
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Volume:
80
Year:
1997
Pages:
11
DOI:
10.1002/(sici)1520-6424(199709)80:93.0.co;2-e
File:
PDF, 1.30 MB
1997
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