Analysis and architecture design of an HDTV720p 30 frames/s...

IEEE Transactions on Circuits and Systems for Video Technology 2006 Vol. 16; Iss. 6

Analysis and architecture design of an HDTV720p 30 frames/s H.264/AVC encoder

Tung-Chien Chen, Shao-Yi Chien, Yu-Wen Huang, Chen-Han Tsai, Ching-Yeh Chen, To-Wei Chen, Liang-Gee Chen
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Volume:
16
Year:
2006
Language:
english
Pages:
16
DOI:
10.1109/tcsvt.2006.873163
File:
PDF, 2.71 MB
english, 2006
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