![](/img/cover-not-exists.png)
[IEEE 2008 International Solid-State Circuits Conference - (ISSCC) - San Francisco, CA, USA (2008.02.3-2008.02.7)] 2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers - A 45nm 4Gb 3-Dimensional Double-Stacked Multi-Level NAND Flash Memory with Shared Bitline Structure
Park, Ki-Tae, Kim, Doogon, Hwang, Soonwook, Kang, Myounggon, Cho, Hoosung, Jeong, Youngwook, Seo, Yong-Il, Jang, Jaehoon, Kim, Han-Soo, Jung, Soon-Moon, Lee, Yeong-Taek, Kim, Changhyun, Lee, Won-SeongYear:
2008
Language:
english
Pages:
123
DOI:
10.1109/isscc.2008.4523281
File:
PDF, 434 KB
english, 2008