A chip select access time measurement method for high-speed...

Electronics and Communications in Japan (Part II: Electronics)) 1990 Vol. 73; Iss. 9

A chip select access time measurement method for high-speed MOS static RAM

Yasumasa Nishimura, Koji Tanaka, Katsuki Ichinose, Takao Nakano
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Volume:
73
Year:
1990
Language:
english
Pages:
12
DOI:
10.1002/ecjb.4420730906
File:
PDF, 882 KB
english, 1990
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