A high-speed BiCMOS gate array using bicmos gate circuit...

Electronics and Communications in Japan (Part II: Electronics)) 1991 Vol. 74; Iss. 5

A high-speed BiCMOS gate array using bicmos gate circuit featured by darlington buffer

Masao Suzuki, Tadao Nagatsuma, Eiichi Sano, Yoshiji Kobayashi, Chikara Yamaguchi
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Volume:
74
Year:
1991
Language:
english
Pages:
11
DOI:
10.1002/ecjb.4420740512
File:
PDF, 689 KB
english, 1991
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