Electronics and Communications in Japan (Part III: Fundamental Electronic Science))
1989 Vol. 72; Iss. 7
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Block placement method based on evaluation of idle area using simulated annealing
Seiichi Koakutsu, Yasuo Sugai, Hironori HirataVolume:
72
Year:
1989
Language:
english
Pages:
10
DOI:
10.1002/ecjc.4430720702
File:
PDF, 651 KB
english, 1989