Automatic design of a parallel/pipelined VLSI architecture...

Electronics and Communications in Japan (Part III: Fundamental Electronic Science)) 1991 Vol. 74; Iss. 11

Automatic design of a parallel/pipelined VLSI architecture for signal processing

Yutaka Yokoyama, Yoshikazu Miyanaga, Koji Tochinai
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Volume:
74
Year:
1991
Language:
english
Pages:
10
DOI:
10.1002/ecjc.4430741104
File:
PDF, 726 KB
english, 1991
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