A Fail-safe Logic Operator Using an Insulated Planar...

A Fail-safe Logic Operator Using an Insulated Planar Transformer

Norihiro Asada, Hidetoshi Matsuki, Masayoshi Esashi
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Volume:
115
Year:
1995
Language:
english
Pages:
8
DOI:
10.1002/eej.4391150211
File:
PDF, 564 KB
english, 1995
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