High-performance cell transistor design using metallic...

IEEE Transactions on Electron Devices 1999 Vol. 46; Iss. 6

High-performance cell transistor design using metallic shield embedded shallow trench isolation (MSE-STI) for Gbit generation DRAM's

Jai-Hoon Sim, Jae-Kyu Lee, Kinam Kim
How much do you like this book?
What’s the quality of the file?
Download the book for quality assessment
What’s the quality of the downloaded files?
Volume:
46
Year:
1999
Language:
english
Pages:
6
DOI:
10.1109/16.766887
File:
PDF, 253 KB
english, 1999
Conversion to is in progress
Conversion to is failed