A new dual gate design for low current pulse operation in...

A new dual gate design for low current pulse operation in 16 Mb ion-implanted bubble memory devices

Sato, T., Saito, K., Hiroshima, M., Yanai, M., Toyooka, T., Takeshita, M., Suzuki, R.
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Volume:
26
Year:
1990
Language:
english
Pages:
3
DOI:
10.1109/20.104781
File:
PDF, 362 KB
english, 1990
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