Small-signal analysis and minimum settling time design of a...

Small-signal analysis and minimum settling time design of a one-stage folded-cascode CMOS operational amplifier

Yang, H.C., Abu-Dayeh, M.A., Allstot, D.J.
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Volume:
38
Year:
1991
Language:
english
Pages:
4
DOI:
10.1109/31.135753
File:
PDF, 379 KB
english, 1991
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