Evaluation of the impact of layout on device and analog circuit performance with lateral asymmetric channel MOSFETs
Kumar, D.V., Narasimhulu, K., Reddy, P.S., Shojaei-Baghini, M., Sharma, D.K., Patil, M.B., Rao, V.R.Volume:
52
Year:
2005
Language:
english
Pages:
7
DOI:
10.1109/ted.2005.850941
File:
PDF, 1.05 MB
english, 2005