A wafer-scale 3-D circuit integration technology

A wafer-scale 3-D circuit integration technology

Burns, J.A., Aull, B.F., Chen, C.K., Chang-Lee Chen, Keast, C.L., Knecht, J.M., Suntharalingam, V., Warner, K., Wyatt, P.W., Yost, D.-R.W.
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Volume:
53
Year:
2006
Language:
english
Pages:
10
DOI:
10.1109/ted.2006.882043
File:
PDF, 1.11 MB
english, 2006
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