Hierarchical Benchmark Circuit Generation for FPGA...

ACM Transactions on Embedded Computing Systems 2012 / 08 Vol. 11; Iss. S2

Hierarchical Benchmark Circuit Generation for FPGA Architecture Evaluation

Mark, Cindy, Chin, Scott Y. L., Shannon, Lesley, Wilton, Steven J. E.
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Volume:
11
Language:
english
Pages:
25
Journal:
ACM Transactions on Embedded Computing Systems
DOI:
10.1145/2331147.2331152
Date:
August, 2012
File:
PDF, 599 KB
english, 2012
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