![](/img/cover-not-exists.png)
Corrections to “VLSI Design of Diminished-One Modulo Adder Using Circular Carry Selection” [Sep 08 897-901]
Tso-Bing Juang, Ming-Yu Tsai, Chin-Chieh ChiuVolume:
56
Year:
2009
Language:
english
Pages:
262
DOI:
10.1109/tcsii.2009.2015352
File:
PDF, 184 KB
english, 2009