[IEEE 2010 NORCHIP - Tampere, Finland (2010.11.15-2010.11.16)] NORCHIP 2010 - An analysis of designing 2D/3D chip multiprocessor wit different cache architecture
Xu, Thomas Canhao, Liang Guang,, Yin, Alexander Wei, Bo Yang,, Liljeberg, Pasi, Tenhunen, HannuYear:
2010
Language:
english
Pages:
6
DOI:
10.1109/norchip.2010.5669433
File:
PDF, 1.69 MB
english, 2010