Two-dimensional parallel pipeline smart pixel array...

IEEE Journal of Selected Topics in Quantum Electronics 1999 Vol. 5; Iss. 2

Two-dimensional parallel pipeline smart pixel array cellular logic (SPARCL) processors-chip design and system implementation

Kuznia, C.B., Wu, J.-M., Chen, C.-H., Hoanca, B., Cheng, L., Weber, A.G., Sawchuk, A.A.
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Volume:
5
Year:
1999
Language:
english
DOI:
10.1109/2944.778326
File:
PDF, 671 KB
english, 1999
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