1.8-V 800-Mb/s/pin DDR2 and 2.5-V 400-Mb/s/pin DDR1...

IEEE Journal of Solid-State Circuits 2005 Vol. 40; Iss. 4

1.8-V 800-Mb/s/pin DDR2 and 2.5-V 400-Mb/s/pin DDR1 compatibly designed 1Gb SDRAM with dual-clock input-latch scheme and hybrid multi-oxide output buffer

Fujisawa, H., Nakamura, M., Takai, Y., Koshikawa, Y., Matano, T., Narui, S., Usuki, N., Dono, C., Miyatake, S., Morino, M., Arai, K., Kubouchi, S., Fujii, I., Yoko, H., Adachi, T.
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Volume:
40
Year:
2005
Language:
english
DOI:
10.1109/jssc.2005.845555
File:
PDF, 1.55 MB
english, 2005
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