An 80-Tile Sub-100-W TeraFLOPS Processor in 65-nm CMOS
Vangal, S.R., Howard, J., Ruhl, G., Dighe, S., Wilson, H., Tschanz, J., Finan, D., Singh, A., Jacob, T., Jain, S., Erraguntla, V., Roberts, C., Hoskote, Y., Borkar, N., Borkar, S.Volume:
43
Year:
2008
Language:
english
DOI:
10.1109/jssc.2007.910957
File:
PDF, 4.54 MB
english, 2008