A 1.6 GB/s DDR2 128 Mb Chain FeRAM With Scalable Octal...

IEEE Journal of Solid-State Circuits 2010 Vol. 45; Iss. 1

A 1.6 GB/s DDR2 128 Mb Chain FeRAM With Scalable Octal Bitline and Sensing Schemes

Shiga, H., Takashima, D., Shiratake, S., Hoya, K., Miyakawa, T., Ogiwara, R., Fukuda, R., Takizawa, R., Hatsuda, K., Matsuoka, F., Nagadomi, Y., Hashimoto, D., Nishimura, H., Hioka, T., Doumae, S., Sh
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Volume:
45
Year:
2010
Language:
english
DOI:
10.1109/jssc.2009.2034414
File:
PDF, 2.57 MB
english, 2010
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