![](/img/cover-not-exists.png)
A 20-MHz Bandwidth Continuous-Time Sigma-Delta Modulator With Jitter Immunity Improved Full Clock Period SCR (FSCR) DAC and High-Speed DWA
Jun-Gi Jo, Jinho Noh, Changsik YooVolume:
46
Year:
2011
Language:
english
DOI:
10.1109/jssc.2011.2164296
File:
PDF, 1.59 MB
english, 2011