Low-Power Optimization by Smart Bit-Width Allocation in a...

Low-Power Optimization by Smart Bit-Width Allocation in a SystemC-Based ASIC Design Environment

Arindam Mallik, Debjit Sinha, Prithviraj Banerjee, Hai Zhou
How much do you like this book?
What’s the quality of the file?
Download the book for quality assessment
What’s the quality of the downloaded files?
Volume:
26
Year:
2007
Language:
english
DOI:
10.1109/tcad.2006.888291
File:
PDF, 490 KB
english, 2007
Conversion to is in progress
Conversion to is failed