SOC Test Architecture and Method for 3-D ICs

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 2010 Vol. 29; Iss. 10

SOC Test Architecture and Method for 3-D ICs

Chih-Yen Lo, Yu-Tsao Hsing, Li-Ming Denq, Cheng-Wen Wu
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Volume:
29
Year:
2010
Language:
english
DOI:
10.1109/tcad.2010.2051732
File:
PDF, 568 KB
english, 2010
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