A Mapping Flow for Dynamically Reconfigurable Multi-Core...

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 2011 Vol. 30; Iss. 8

A Mapping Flow for Dynamically Reconfigurable Multi-Core System-on-Chip Design

Beretta, I., Rana, V., Atienza, D., Sciuto, D.
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Volume:
30
Year:
2011
Language:
english
DOI:
10.1109/tcad.2011.2138140
File:
PDF, 709 KB
english, 2011
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