Efficiency of body biasing in 90-nm CMOS for low-power...

IEEE Journal of Solid-State Circuits 2005 Vol. 40; Iss. 7

Efficiency of body biasing in 90-nm CMOS for low-power digital circuits

von Arnim, K., Borinski, E., Seegebrecht, P., Fiedler, H., Brederlow, R., Thewes, R., Berthold, J., Pacha, C.
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Volume:
40
Year:
2005
Language:
english
DOI:
10.1109/jssc.2005.847517
File:
PDF, 801 KB
english, 2005
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