DFT and Minimum Leakage Pattern Generation for Static Power...

IEEE Transactions on Very Large Scale Integration (VLSI) Systems 2010 Vol. 18; Iss. 3

DFT and Minimum Leakage Pattern Generation for Static Power Reduction During Test and Burn-In

Wei-Chung Kao, Wei-Shun Chuang, Hsiu-Ting Lin, Li, J.C.-M., Manquinho, V.
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Volume:
18
Year:
2010
Language:
english
DOI:
10.1109/tvlsi.2008.2011048
File:
PDF, 672 KB
english, 2010
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