Parallel Interleavers Through Optimized Memory Address...

IEEE Transactions on Very Large Scale Integration (VLSI) Systems 2010 Vol. 18; Iss. 6

Parallel Interleavers Through Optimized Memory Address Remapping

Jing-ling Yang
How much do you like this book?
What’s the quality of the file?
Download the book for quality assessment
What’s the quality of the downloaded files?
Volume:
18
Year:
2010
Language:
english
DOI:
10.1109/tvlsi.2009.2019076
File:
PDF, 331 KB
english, 2010
Conversion to is in progress
Conversion to is failed