Circuit Level Modeling Methodology of Parasitic Substrate...

Circuit Level Modeling Methodology of Parasitic Substrate Current Injection from a High-Voltage H-bridge at High Temperature

Lo Conte, F., Sallese, J.-M., Kayal, M.
How much do you like this book?
What’s the quality of the file?
Download the book for quality assessment
What’s the quality of the downloaded files?
Volume:
26
Year:
2011
Language:
english
DOI:
10.1109/tpel.2011.2119495
File:
PDF, 692 KB
english, 2011
Conversion to is in progress
Conversion to is failed