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Comparison of Dual-Rail and TMR Logic Cost Effectiveness and Suitability for FPGAs With Reconfigurable SEU Tolerance
Shuler, Robert L., Bhuva, Bharat L., O'Neill, Patrick M., Gambles, Jody W., Rezgui, SanaVolume:
56
Language:
english
Journal:
IEEE Transactions on Nuclear Science
DOI:
10.1109/tns.2008.2010320
Date:
February, 2009
File:
PDF, 358 KB
english, 2009