[Lecture Notes in Electrical Engineering] Low Power RF Circuit Design in Standard CMOS Technology Volume 104 || Phase Locked Loop (PLL) Design
Alvarado, Unai, Bistué, Guillermo, Adín, IñigoVolume:
10.1007/97
Year:
2012
Language:
english
DOI:
10.1007/978-3-642-22987-9_8
File:
PDF, 9.89 MB
english, 2012