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[IEEE Comput. Soc. Press 10th IEEE Symposium on Computer Arithmetic - Grenoble, France (26-28 June 1991)] [1991] Proceedings 10th IEEE Symposium on Computer Arithmetic - High-speed multiplier design using multi-input counter and compressor circuits
Mehta, M., Parmar, V., Swartzlander, E.Year:
1991
Language:
english
DOI:
10.1109/arith.1991.145532
File:
PDF, 571 KB
english, 1991