Multiprocessor information concealment architecture to...

IET Computers & Digital Techniques 2011 Vol. 5; Iss. 1

Multiprocessor information concealment architecture to prevent power analysis-based side channel attacks

Ambrose, J.A., Ragel, R.G., Parameswaran, S., Ignjatovic, A.
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Volume:
5
Year:
2011
Language:
english
DOI:
10.1049/iet-cdt.2009.0097
File:
PDF, 1.41 MB
english, 2011
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