A Hierarchical Simulation Flow for Return-Loss Optimization...

IEEE Transactions on Advanced Packaging 2010 Vol. 33; Iss. 4

A Hierarchical Simulation Flow for Return-Loss Optimization of Microprocessor Package Vertical Interconnects

Sathanur, A.V., Jandhyala, V., Braunisch, H.
How much do you like this book?
What’s the quality of the file?
Download the book for quality assessment
What’s the quality of the downloaded files?
Volume:
33
Year:
2010
Language:
english
DOI:
10.1109/tadvp.2010.2049490
File:
PDF, 1.28 MB
english, 2010
Conversion to is in progress
Conversion to is failed