High-performance VLSI architecture of multiplierless LMS...

Electronics and Communications in Japan (Part III: Fundamental Electronic Science)) 2001 Vol. 84; Iss. 5

High-performance VLSI architecture of multiplierless LMS adaptive filters using distributed arithmetic

Yoshitaka Tsunekawa, Kyo Takahashi, Shinji Toyoda, Mamoru Miura
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Volume:
84
Year:
2001
Language:
english
Pages:
12
DOI:
10.1002/1520-6440(200105)84:53.0.co;2-5
File:
PDF, 261 KB
english, 2001
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