TSV Minimization for Circuit — Partitioned 3D SoC Test...

TSV Minimization for Circuit — Partitioned 3D SoC Test Wrapper Design

Cheng, Yuan-Qing, Zhang, Lei, Han, Yin-He, Li, Xiao-Wei
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Volume:
28
Language:
english
Journal:
Journal of Computer Science and Technology
DOI:
10.1007/s11390-013-1316-6
Date:
January, 2013
File:
PDF, 772 KB
english, 2013
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