A fast method for timing verification that uses the...

A fast method for timing verification that uses the conditions that cause changes in the output values of gates

Atsushi Ohnishi, Yuji Sugiyama
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Volume:
32
Year:
2001
Language:
english
Pages:
7
DOI:
10.1002/1520-684x(200101)32:13.0.co;2-f
File:
PDF, 152 KB
english, 2001
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