Design of testable VLSI circuits with minimum area overhead

IEEE Transactions on Computers 1989 Vol. 38; Iss. 10

Design of testable VLSI circuits with minimum area overhead

Chalasani, P.R., Bhawmik, S., Acharya, A., Palchaudhuri, P.
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Volume:
38
Year:
1989
Language:
english
DOI:
10.1109/12.35841
File:
PDF, 355 KB
english, 1989
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