Design for concurrent error detection and testability in...

IEEE Journal of Solid-State Circuits 1994 Vol. 29; Iss. 7

Design for concurrent error detection and testability in storage/logic arrays

Savin, H.V., Bucknell, M.S., Spaulding, M.D., Maciukenas, T.B., Kent Fuchs, W.
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Volume:
29
Year:
1994
Language:
english
DOI:
10.1109/4.303714
File:
PDF, 1009 KB
english, 1994
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