FLAG: a flexible layout generator for analog MOS...

IEEE Journal of Solid-State Circuits 1998 Vol. 33; Iss. 6

FLAG: a flexible layout generator for analog MOS transistors

Mathias, H., Berger-Toussan, J., Jacquemod, G., Gaffiot, F., Le Helley, M.L.
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Volume:
33
Year:
1998
Language:
english
DOI:
10.1109/4.678653
File:
PDF, 376 KB
english, 1998
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