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Source-synchronization and timing vernier techniques for 1.2-GB/s SLDRAM interface
Nakase, Y., Morooka, Y., Perlman, D.J., Kolor, D.J., Jae-Myoung Choi, Shin, H.J., Yoshimura, T., Watanabe, N., Matsuda, Y., Kumanoya, M., Yamada, M.Volume:
34
Year:
1999
Language:
english
DOI:
10.1109/4.753682
File:
PDF, 1.08 MB
english, 1999