A low-jitter PLL clock generator for microprocessors with...

IEEE Journal of Solid-State Circuits 1999 Vol. 34; Iss. 4

A low-jitter PLL clock generator for microprocessors with lock range of 340-612 MHz

Boerstler, D.W.
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Volume:
34
Year:
1999
Language:
english
DOI:
10.1109/4.753684
File:
PDF, 666 KB
english, 1999
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