A 5.3-GB/s embedded SDRAM core with slight-boost scheme

IEEE Journal of Solid-State Circuits 1999 Vol. 34; Iss. 5

A 5.3-GB/s embedded SDRAM core with slight-boost scheme

Yamazaki, A., Yamagata, T., Hatakenaka, M., Miyanishi, A., Hayashi, I., Tomishima, S., Mangyo, A., Yukinari, Y., Tatsumi, T., Matsumura, M., Arimoto, K., Yamada, M.
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Volume:
34
Year:
1999
Language:
english
DOI:
10.1109/4.760377
File:
PDF, 508 KB
english, 1999
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