A 440-ps 64-bit adder in 1.5-V/0.18-μm partially depleted...

IEEE Journal of Solid-State Circuits 2001 Vol. 36; Iss. 10

A 440-ps 64-bit adder in 1.5-V/0.18-μm partially depleted SOI technology

Stasiak, D.L., Mounes-Toussi, F., Storino, S.N.
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Volume:
36
Year:
2001
Language:
english
DOI:
10.1109/4.953483
File:
PDF, 140 KB
english, 2001
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