Conditionally robust two-pattern tests and CMOS design for...

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 1988 Vol. 7; Iss. 3

Conditionally robust two-pattern tests and CMOS design for testability

Sherlekar, S.D., Subramanian, P.S.
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Volume:
7
Year:
1988
Language:
english
DOI:
10.1109/43.3165
File:
PDF, 684 KB
english, 1988
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