Timing optimization by gate resizing and critical path...

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 1995 Vol. 14; Iss. 2

Timing optimization by gate resizing and critical path identification

Chen-Liang Fang, Wen-Ben Jone
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Volume:
14
Year:
1995
Language:
english
DOI:
10.1109/43.370424
File:
PDF, 1.67 MB
english, 1995
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