A low-power multiplying DLL for low-jitter multigigahertz...

IEEE Journal of Solid-State Circuits 2002 Vol. 37; Iss. 12

A low-power multiplying DLL for low-jitter multigigahertz clock generation in highly integrated digital chips

Farjad-Rad, R., Dally, W., Hiok-Tiaq Ng, Senthinathan, R., Lee, M.-J.E., Rathi, R., Poulton, J.
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Volume:
37
Year:
2002
Language:
english
DOI:
10.1109/jssc.2002.804340
File:
PDF, 1.25 MB
english, 2002
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