A Systematic Approach to Memory Test Time Reduction

IEEE Design & Test of Computers 2008 Vol. 25; Iss. 6

A Systematic Approach to Memory Test Time Reduction

Jen-Chieh Yeh, Chao-Hsun Chen, Cheng-Wen Wu, Shuo-Fen Kuo
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Volume:
25
Year:
2008
Language:
english
DOI:
10.1109/mdt.2008.152
File:
PDF, 813 KB
english, 2008
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