A 20 Gb/s Clock and Data Recovery With a Ping-Pong Delay...

IEEE Transactions on Circuits and Systems I Fundamental Theory and Applications 2013 / 02 Vol. 60; Iss. 2

A 20 Gb/s Clock and Data Recovery With a Ping-Pong Delay Line for Unlimited Phase Shifting in 65 nm CMOS Process

Kwak, Young-Ho, Kim, Yongtae, Hwang, Sewook, Kim, Chulwoo
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Volume:
60
Language:
english
Journal:
IEEE Transactions on Circuits and Systems I: Regular Papers
DOI:
10.1109/TCSI.2012.2215781
Date:
February, 2013
File:
PDF, 1.94 MB
english, 2013
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